Low voltage differential signalling (LVDS) is a serial communication method that is widely used. Information is communicated as the difference in voltage between two conductors (e.g. wires). In a typical implementation, the two conductors are connected at the termination end by a 100 ohm resistor, and constant current is injected into the wires. The direction of current flow through the termination resistor determines the digital logic level of the voltage difference between the conductors at the termination end. The receiver senses the polarity of this voltage difference to determine the logic level. A common mode voltage is applied to both conductors. Typical current flows may be around 3.5 mA, resulting in a typical voltage difference of around 350 mV across the termination resistor. A relatively low common mode voltage may be used, for example, 600 mV.
Different process technologies have different operating voltage requirements. Process nodes with small half-pitch dimensions have reduced voltage requirements and a reduced maximum voltage. In contrast, high speed signal processing may require heterojunction devices with higher voltage requirements and a higher maximum voltage. Communications between dice with different process technologies may be necessary, and it is typically desirable to minimise the number of external components in electronic systems, which reduces cost and keeps the size of the system to a minimum. A single chip solution is generally preferable to a multi-chip module or system in a package. A multi-chip module or system in package is generally preferable to a requirement for a large area of printed circuit board comprising several off-chip components. It is therefore not always practical to provide an external passive termination resistor in an LVDS receiver. A solution that enables LVDS communication between integrated circuits with dissimilar process technologies is desirable.